A. Field of the Invention
The present invention relates to a hysteresis system with a constant threshold voltage. More particularly, the present invention relates to a hysteresis system which has a constant threshold voltage regardless of an increase or decrease of an output signal from a hysteresis system
B. Description of the Prior Art
A conventional hysteresis system will be described hereinafter in detail with reference to accompanying drawings.
FIG. 1 shows a circuit diagram illustrating a conventional hysteresis system, and FIGS. 2A to 2D are timing charts illustrating operations of the conventional hysteresis system of FIG. 1.
Referring to FIG. 1, the conventional hysteresis system comprises a first resistor R1 with one terminal for receiving an input signal Vin1, a capacitor C1 with one terminal connected to the other terminal of the first resistor R1 and with the other terminal grounded, a second resistor R2 with one terminal for receiving power VS, a third resistor R3 with one terminal connected to the other terminal of the second resistor R2 and with the other terminal grounded, a fourth resistor R4 with one terminal connected to the other terminal of the second resistor R2, an operational amplifier OP1 with a non-inverting input terminal (+) connected to the other terminal of the first resistor R1 and with an inverting input terminal connected to the other terminal of the second resistor R2, and a transistor Q1 with a collector connected to the other terminal of the fourth resistor R4, with a base connected to an output terminal of the operation amplifier OP1 and with an emitter grounded.
The operation of the conventional hysteresis system will be described hereinafter.
If a first input signal Vin1 is inputted as illustrated in FIG. 2A while power VS is applied, a waveform of a second input signal Vin2 is formed according to values of the first resistor R1 and the capacitor C1 as illustrated in FIG. 2B.
That is, if the first input signal Vin1 is inputted in a high level (t1), the value of the second input signal Vin2 is gradually increased by capacitance of the capacitor C1 as the capacitor C1 is charged, and the value of the second input signal Vin2 is gradually reduced if the value of the first input signal Vin1 is again changed to a low signal (t3). As a result, the waveform of the second input signal Vin2 is formed as illustrated in FIG. 2B, and the second input signal Vin2 is inputted to the non-inverting input terminal of the operational amplifier OP1.
On the other hand, the threshold voltage Vth inputted to the inverting input terminal of the operational amplifier OP1 is determined according to the ratio of the second resistor R2 and the third resistor R3 and maintained constant at first when the power VS is applied, and an output signal Vout of the operational amplifier OP1 is maintained at the low level. From the moment that the value of the second input signal Vin2 is greater than a value of the threshold voltage Vth (t2), the output signal Vout of the operational amplifier OP1 is changed to the low level, and concurrently the transistor Q1 is turned OFF, thereby changing the threshold voltage Vth into the high level.
Accordingly, the conventional hysteresis system has its threshold voltage changed according to the output signal Vout of the operational amplifier OP1. If the threshold voltage is defined as a first threshold voltage Vth(1) when the output signal Vout of the operational amplifier OP1 is at the high level, and the threshold voltage is defined as a second threshold voltage Vth(h) when the output signal Vout of the operational amplifier OP1 is at the low level, the hysteresis voltage Vhys can be expressed as follows: EQU Vhys=Vth(h)-Vth(1) (1)
That is, the conventional hysteresis system has a disadvantage that it is not possible to apply to a system requiring a constant threshold voltage regardless of an increase or decrease of the input signal, since it has its threshold voltage changed according to the output terminal of the operation amplifier.